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TSH122
Ultra low power video buffer/filter with power-down
Features
SC70

Very low consumption: 1.7 mA Ultra low power-down mode: 4 nA typ., 500 nA max. Internal 6th order reconstruction filter Internal gain of 6 dB Rail-to-rail output buffer for 75 video line Excellent video performance - Differential gain 0.5% - Differential phase 0.10 - Group delay of 10 ns SAG correction Bottom of video signal close to 0 V Tested with 2.5 V and 3.3 V single supply Data min. and max. are physically tested and guaranteed during production (consumption, gain, filtering, and other parameters are guaranteed)
SAG 3 4 OUT GND 2 5 EN (enable) Top view IN 1 6 Vcc

Applications

Description
The TSH122 is a video buffer that uses a voltage feedback amplifier, with an internal gain of 6 dB, an output rail-to-rail, an internal input DC-shift and a SAG correction. A power-down function allows switching to a sleep mode with an ultra-low consumption. The TSH122 features a 6th-order internal reconstruction filter to attenuate the parasitic frequency of 27 MHz from the clock of the video DAC. The TSH122 operates from 2.25 to 5 V single power supplies and is tested at 2.5 V and 3.3 V. The TSH122 is a single operator available in a tiny SC70 plastic package for space saving.
Mobile phones Digital still camera Digital video camera Portable DVD players
August 2008
Rev 1
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www.st.com 16
Absolute maximum ratings and operating conditions
TSH122
1
Absolute maximum ratings and operating conditions
Table 1.
Symbol
VCC Vin
Absolute maximum ratings
Parameter Supply voltage(1) Maximum input amplitude Storage temperature Maximum junction temperature SC70 thermal resistance junction to ambient area SC70 thermal resistance junction to case Maximum power dissipation for Tj=150C Tamb = +25C Tamb = +85C CDM: charged device model(2) HBM: human body model(3) MM: machine model(4) Output short-circuit Value 5.5 0 to Vcc -65 to +150 150 205 172 609 317 1.5 1.5 300
(5)
Unit V V C C C/W C/W mW kV kV V
Tstg Tj Rthja Rthjc Pmax
ESD
1. All voltage values, except differential voltage, are with respect to network terminal. 2. Charged device model: all pins and the package are charged together to the specified voltage and then discharged directly to the ground through only one pin. This is done for all pins. 3. Human body model: a 100 pF capacitor is charged to the specified voltage, then discharged through a 1.5 k resistor between two pins of the device. This is done for all couples of connected pin combinations while the other pins are floating. 4. Machine model: a 200 pF capacitor is charged to the specified voltage, then discharged directly between two pins of the device with no external series resistor (internal resistor < 5 ). This is done for all couples of connected pin combinations while the other pins are floating 5. An output current limitation protects the circuit from transient currents. Short-circuits can cause excessive heating. Destructive dissipation can result from short-circuits on amplifiers.
Table 2.
Symbol
VCC
Operating conditions
Parameter Power supply voltage Operating free air temperature range Value 2.25 to 5 (1) -40 to +85 Unit V C
Toper
1. Tested in full production at 0 V/2.5 V and 0 V/3.3 V single power supply.
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TSH122
Electrical characteristics
2
Table 3.
Symbol
Electrical characteristics
VCC = +2.5V, +3.3V, Tamb = 25C (unless otherwise specified)
Parameter Test conditions Min. Typ. Max. Unit
DC performance Vdc Iib Output DC level shift RL = 150 VCC = +3.3V Input bias current VCC = +3.3V, Tmin Tamb Tmax Vin=0V to 1V DC, VCC=+2.5V G Internal voltage gain Vin=0V to 1.4V DC, VCC=+3.3V VCC=3.3V Tmin Tamb Tmax PSRR Power supply rejection ratio 20 log (VCC/Vout) VCC=100mV at 1kHz Vin=+0.5V DC Vin=0V, no load VCC=+3.3V VCC=+2.5V VCC=+3.3V Tmin Tamb Tmax Dynamic performance and output characteristics Small signal VCC=+3.3V, RL = 150 -3dB bandwidth -1dB bandwidth -1dB bandwidth VCC = +3.3V, Tmin Tamb Tmax Small signal VCC=+3.3V, RL=150 VCC = +3.3V, Tmin Tamb Tmax G Gd VOH Differential gain Differential phase Group delay High level output voltage VCC=+3.3V, RL=150 VCC=+3.3V, RL=150 VCC=+3.3V, 10kHz-5MHz VCC=+3.3V, RL=150 VCC=+2.5V, RL=150 3.1 2.3 36 5.8 5.8 70 -1.5 115 -0.87 -0.93 6 6 5.96 55 dB 6.1 6.1 dB A 168 mV
ICC
Positive supply current DC consumption
2 1.7 2.4
2.4 2.1
mA
mA
BW
Filter bandwidth
5.4
9.5 7.2 6.75
MHz
47 46 0.5 0.1 6 3.2 2.4
dB dB % ns V
FR
27 MHz rejection
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Electrical characteristics Table 3.
Symbol VOL Iout
TSH122
VCC = +2.5V, +3.3V, Tamb = 25C (unless otherwise specified) (continued)
Parameter Low level output voltage Output short circuit current Test conditions RL = 150 VCC=+2.5V Min. Typ. 11 75 Max. 40 Unit mV mA
Noise and distortion eN Total output noise F = 100kHz, no load VCC=+3.3V, RL = 150 Vin=1Vp-p, F=1MHz H2 H3 51 nV/Hz
HD
Harmonic distortion
64 61
dBc
Enable/power-down Low level on pin-5: TSH122 in power-down High level on pin-5: TSH122 enabled Isd Vlow Vhigh Ton Toff Consumption in power-down mode Low-level threshold High-level threshold Time from power-down to enable Time from enable to power-down VCC=+3.3V 0 +0.7 1 1 4 500 +0.3 VCC nA V V s s
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TSH122
Electrical characteristics
Figure 1.
10 0 -10 -20
Frequency response
Figure 2.
6.2 6.1 6.0 5.9
Gain flatness
Vcc=+2.5V Vcc=+3.3V
Flatness (dB)
Gain (dB)
5.8 5.7 5.6 5.5
-30 -40 -50 -60 -70 -80 1M
Vcc=+5V
Vcc=3.3V Load=150 Small signal Vicm=0.5V
10M 100M
5.4 5.3 5.2 1M
10M
Frequency (Hz)
Frequency (Hz)
Figure 3.
250
Input noise
No load Input to GND Vcc=+2.5V and +3.3V
Figure 4.
5
Distortion
Vcc=+5V
Load=150
4
200
en (nV/VHz)
Vout (V)
150
3
Vcc=+3.3V Vcc=+2.5V
100
2
50
1
0 100
1k
10k
100k
1M
0 0.0
0.5
1.0
1.5
2.0
2.5
Frequency (Hz)
Vin (V)
Figure 5.
-30
Distortion at Vcc=2.5 V
Figure 6.
-30
Distortion at Vcc=3.3 V
-40
Vcc=2.5V Load=150
-40
Vcc=3.3V Load=150
-50
-50
Distortion (dB)
-60
Distortion (dB)
-60
-70
H2
-70
H2 H3
-80
H3
-80
-90
-90
-100 0.0
0.5
1.0
1.5
2.0
2.5
-100 0.0
0.5
1.0
1.5
2.0
2.5
3.0
Output Amplitude (Vp-p)
Output Amplitude (Vp-p)
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Electrical characteristics
TSH122
Figure 7.
125 124 123
DCshift vs. Vcc
Figure 8.
10 9 8 7
VOL vs. Vcc
Output DCshift (mV)
122 121 120 119 118 117 116 115 2.0
VOL (mV)
6 5 4 3 2
Load=150
2.5 3.0 3.5 4.0 4.5 5.0
1 0 2
Vin= -100mV Load=150
3 4 5
Vcc (V)
Vcc (V)
Figure 9.
4.0 3.5
Icc vs. Vcc
Figure 10. Power down
2.00
1.75 3.0 1.50 2.5
Icc (mA)
Isd (nA)
0 1 2 3 4 5 6
2.0 1.5
1.25
1.00 1.0 0.75 0.5 0.0 0.50 2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
Vcc (V)
Vcc (V)
Figure 11. Switch-on output settling
Figure 12. Switch-off output settling
EN (pin5)
EN (pin5)
Vout (pin4)
Vout (pin4)
Vcc=+3.3V, Vin=+1.3Vdc
Vcc=+3.3V, Vin=+1.3Vdc
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TSH122
Electrical characteristics
Figure 13. In/Out switch on/off
Figure 14. Synchronization tip at 0 V
Vin
Vin
Vout
Vout
EN (pin5)
Vcc=+3.3V
Vcc=+3.3V
Figure 15. VOL vs. temperature
20.0 17.5 15.0
Figure 16. VOH vs. temperature
5.0
Load=150
4.5
4.0
VOH (mV)
VOL (mV)
12.5 10.0 7.5 5.0 2.5
Vcc=+2.5V
3.5
Vcc=+3.3V
3.0
Vcc=+3.3V
2.5
Load=150
0.0 -40 -20 0 20 40 60 80
Vcc=+2.5V
2.0 -40 -20 0 20 40 60 80
Temperature (C)
Temperature (C)
Figure 17. Bandwidth vs. temperature
9.0 8.5
Figure 18. Attenuation vs. temperature
-40.0 -42.5
Attenuation@27MHz (dB)
8.0
Vcc=+2.5V
Vcc=+2.5V
-45.0 -47.5 -50.0 -52.5 -55.0 -57.5
Bw@-1dB (MHz)
7.5 7.0 6.5 6.0 5.5 5.0 4.5 4.0 -40
Vcc=+3.3V
Vcc=+3.3V
Small signal Load=150
-20 0 20 40 60 80
Load=150
-60.0 -40 -20 0 20 40 60 80
Temperature (C)
Temperature (C)
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Electrical characteristics
TSH122
Figure 19. Icc vs. temperature
3.0
Figure 20. Gain vs. temperature
6.10
2.5
Vcc=+3.3V
2.0
6.05
Gain (dB)
ICC (mA)
Vcc=+3.3V
6.00
1.5
Vcc=+2.5V
1.0 5.95 0.5
Vcc=+2.5V
no Load
0.0 -40 -20 0 20 40 60 80 5.90 -40
Load=150
-20 0 20 40 60 80
Temperature (C)
Temperature (C)
Figure 21. Output DC shift vs. temperature
200 180 160
Figure 22. Ibias vs. temperature
0.00
Vcc=+2.5V and +3.3V Load=150
-0.25 -0.50
Output DCshift (mV)
140
IBIAS (A)
120 100 80 60
-0.75 -1.00 -1.25 -1.50
Vcc=+2.5V
Vcc=+3.3V
40 20 0 -40 -1.75
Load=150
-20 0 20 40 60 80 -2.00 -40 -20 0 20 40 60 80
Temperature (C)
Temperature (C)
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TSH122
Application information
3
3.1
Application information
Power supply considerations
Correct power supply bypassing is very important for optimizing performance in high-frequency ranges. The bypass capacitors should be placed as close as possible to the IC pins to improve high-frequency bypassing. A capacitor greater than 10 F is necessary to minimize the distortion. For better quality bypassing, we recommend adding a 10 nF capacitor, also placed as close as possible to the IC pins. Figure 23. Circuit for power supply bypassing
Figure 24. Supply noise rejection
10 0
Noise supply rejection (dB)
Vcc=5V(dc)+0.2Vp-p(ac) Load=150 Bypass capacitors: 10F+10nF
-10 -20 -30 -40 -50 -60 -70 -80 10k
100k
1M
10M
100M
Frequency (Hz)
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Application information
TSH122
3.2
3.2.1
Implementation considerations
Input
The DC level shifter optimizes the position of the video signal with no clamping on the output rails.
3.2.2
Filter
A reconstruction filter is used to attenuate the DAC's sampling frequency because it generates a parasitic signal in the video spectrum (typically at 27 MHz in the case of standard video). This function is fulfilled while keeping a low group delay and a good gain flatness along the video band. Figure 25. Internal schematic
2.25 V to 5 V
+Vcc DC shifter Input 1 LPF 6th order + 6 5 Power-down
+
4 Output
R 2R
2R 2R 3 SAG
2
GND
3.2.3
Output
In an AC-coupling configuration, the SAG correction allows use of two small low-cost capacitors in place of one large capacitor (see Figure 26). The AC-coupling output reduces the power consumption by removing the DC component included in the signal. Nevertheless, the output can be directly connected to the line without any capacitor. In this case, the OUT and SAG pins are connected together and the equivalent gain of the buffer remains at 6 dB (see Figure 27).
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TSH122 Figure 26. Schematic diagram with output capacitor
Application information
Figure 27. Schematic diagram without output capacitor
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Application information
TSH122
3.3
Using the TSH122 to drive a Cvbs signal
Figure 28. Details on Cvbs (NTSC color bar 100%)
DAC output amplitude
+133 IRE
~1.3 V
+100 IRE
White
0 IRE
Blanking level Burst Synchronization tip
-40 IRE GND
With its internal DC shift, the TSH122 can drive a video signal from the DAC output as low as 0 V (bottom of the synchronization tip at 0 V - see Figure 14).
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TSH122
Package information
4
Package information
In order to meet environmental requirements, STMicroelectronics offers these devices in ECOPACK(R) packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an STMicroelectronics trademark. ECOPACK specifications are available at: www.st.com. Figure 29. SC70-6 (or SOT323-6) package footprint (in millimeters)
0.65
1.05
0.80
2.90
0.40
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Package information Figure 30. SC70-6 (or SOT323-6) package mechanical data
Dimensions Ref Min A A1 A2 b c D E e HE L Q1 1.8 0.10 0.10 0.80 0 0.80 0.15 0.10 1.80 1.15 0.65 2.4 0.40 0.40 70.8 3.9 3.9 Millimeters Typ Max 1.10 0.10 1.00 0.30 0.18 2.20 1.35 Min 31.5 0 31.5 5.9 3.9 70.8 45.2 25.6 Mils Typ
TSH122
Max 43.3 3.9 39.3 11.8 7.0 86.6 43.1
94.5 15.7 15.7
A2 D A1 b L HE Q1 C e e
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E
A
TSH122
Ordering information
5
Ordering information
Table 4. Order codes
Temperature range -40C to +85C Package SC70 Packaging Tape & reel Marking K31
Part number TSH122ICT
6
Revision history
Table 5.
Date 04-Aug-2008
Document revision history
Revision 1 Initial release. Changes
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TSH122
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